1. Field of the Invention
The present invention relates to methods for high resolution processing of thin layers using electron beams, in particular layers in a mask for photolithography or in a semiconductor device.
2. Description of the Related Art
Semiconductor devices, such as processors or memory chips, can be produced using photolithography. A photo-resist layer on a wafer of a semiconductor material can be exposed to light through a mask which creates a pattern for microscopically fine structures. The wafer of semiconductor material can be subjected to further method steps to manufacture electronic components of the device (e.g., transistors, capacitors etc.). In order to achieve higher densities of integration within a semiconductor device, ultraviolet light (e.g., light with short wavelengths) can be used to expose the photo-resist layer on the wafer of a semiconductor material to light through the mask. Manufacturing suitable masks for this lithography method can be expensive.
If it is found that a mask comprises an error, it is desirable to repair the mask. To this end, it may be necessary to selectively remove or deposit metal layers on the mask. For example, chromium layers can be deposited on the mask which can form the opaque sections of the mask, with a high spatial resolution. A similar problem arises if an already finished semiconductor device is to be modified (so-called “circuit editing”) wherein the structure of the strip conductors of the device is modified with high resolution. The metal layers to be processed are typically arranged within a composite of a metal/metal oxide/insulator.
One method known from the prior art is the processing using a focused ion beam. However, this causes inevitably the implantation of ions in the substrate, for example the quartz substrate of a mask for photolithography, which thereby changes the properties of the wafer. This disadvantage of the ion beam technology is avoided if electron beams are used. More information can be found on this in: T. Liang, et al., “Progress in extreme ultraviolet mask repair using a focused ion beam”, J. Vac. Sci. Technol. B 18(6), 3216 (2000), and T. Liang, et al., “Evaluation of 157 nm substrate damage during mask repair”, 157 nm Lithography Symposium, Dana Point, Calif., May 2001.
In general it is also known to process metals using electron beams of high energy, for example for welding. However, if the diameter of the area covered by the electron beam is less than two micrometers (2 μ), the area heated by the electron beam is significantly greater than the area of the beam supplying the heat. As a consequence, it was considered to be impossible, until now, to process a wafer of a semiconductor material with electron beams having a resolution necessary for the tasks mentioned above.
Also known in the art is a different method called electron beam induced etching (EBIE). It is known that XeF2 can be used as a spontaneous and activatable etching means for the electron beam induced etching of metals and metal oxides, here silicon. For more information please review: J. W. Coburn and H. F. Winters, “Ion- and electron-assisted gas-surface chemistry—an important effect in plasma etching”, J. Appl. Phys. Vol. 50(5), 3189 (1979). The electron beam selectively breaks up the molecules of the etching gas and thereby allows a spatially resolved etching. For example the article “Etching characteristics of chromium thin films by an electron beam induced surface reaction” of P. E. Russel et al. (Semicond. Sci. Technol. 18 (2003) page 199-205) discloses etching thin chromium layers of a mask by the EBIE-method in the presence of XeF2.
The publication of Russel et al. teaches to use XeF2 and high electron energies of 5-20 keV, as well as comparatively high electron currents of 1.6 nA to obtain high yields of removal. However, it is reported that the high electron energy causes a loss of spatial resolution when etching a chromium layer. Furthermore, the method disclosed by Russel et al. does not allow etching of any chromium layer. For example, a chromium layer sputtered onto a silicon substrate could not be etched. The explanation for this failure was that metal contaminations in the deposited chromium layer impaired the etching process.
In the discussion of the measurement results, Russel et al. teach that the surface chemical process, which determines the etching rate, is the desorption of CrO2F2 or, as an alternative reaction product, CrOF2 from the surface of the chromium layer. Oxygen, in contrast, which is to some extent always present in the residual gas of the vacuum chamber, is not considered by Russel et al. to be a relevant factor for the etching rate to be obtained.
Thus, there is a need for repairing masks and editing circuits sufficient to only remove metal/metal oxide/insulating layers. Additionally, selective deposition of a metal layer is also desired. Upon satisfying these needs and desires it will be possible to simply and reliably repair or modify photolithography masks and other metal/metal oxides/insulating layer systems.